On this YouTube video you can see a Papilio FPGA board with a SID 6581 VHDL core (no filters) acting as a networked SID device. The program ACID 64 is used to send the SID data to a network device. Then a program from Markus Gritsch sends this network data to the FPGA via the serial port. The FPGA has a RS232 UART for receiving and sending the data, a 16KB FIFO buffer for storing the data and a emulated SID chip for playing the audio.

ACID64 web page